Homework 3

Due: Monday April 19 by 2:00pm.

Problem:

In this problem you will be writing your name on the LCD display which is mounted on the header above X1 on the BORG board. You will use the Xilinx Foundation Series Project Manager to enter and simulate your design and SIS/eqn2xnf to enter the instruction logic.

The LCD can display two lines of 16 characters.

This LCD is operated through a set of control and data lines as follows. This interface takes instructions or data depending on the value of the RS wire. The table below shows the instructions you will be using. Four instructions are required to initialize the display for the configuration we require (a 1 line by 16 character display). These are shown in the first four lines of the table. So your design must be sure to issue these instructions whenever it is reset. 

Operation     	   RS      R/W     DB7...DB0
Clear Display 	   0       0       0000 0001
Function Set  	   0       0       0011 00**
Display ON    	   0       0       0000 1100
Entry Mode Set     0       0       0000 0110
Write Character    1       0       DDDD DDDD
Backspace     	   0       0       0001 00**
Return Home   	   0       0       0000 001*
Read Character     1       1       DDDD DDDD
(This is enough info to do the project but if you want to know more you can consult the company's Application Notes. App Notes). The timing constraints that must be satisfied when writing information to the display are a little complicated. Basically, the display samples the RS line on the rising edge of the enable signal (E) and the DB lines on the falling edge of E. To keep things simple, the set up and hold time for RS should be one cycle before and after the rising edge of E, respectively: similarly for the DB lines and the falling edge of E.

Since you don't need to perform read operations for this problem, the R/W control line can be tied directly to GND. For normal character write operations, the RS signal should be 1. To execute a command, the RS signal should be 0. The easiest way to perform a write is by asserting the enable signal (E) for one clock cycle during which RS and data are both stable. So the signals generated by your interface should look like:

You must ensure that the data lines, RS and R/W are stable while this is happening. Since the E (enable) signal is used to clock data into the display, it should be hazard-free (no glitches). The easiest way to ensure this is to make it a direct output of a flip-flop.

The LCD is mounted on the top header of X1 on the BORG board. The pins of the LCA are connected to the LCD pins as follows:

D7 D6 D5 D4 D3 D2 D1 D0 E R/W RS
P9 P8 P7 P6 P5 P4 P3 P80 P81 P78 P77

Design a circuit which will issue the 4 initialization instructions above and then 12 instructions to write the first 12 characters of your name (if your name is too short or too long use some variation to make it between 10-12 characters long).

The built-in reset GSR should be used to activate your machine. Remember to add the STARTUP symbol in your top level schematic and connect the BORG's reset switch (via P10) to the STARTUP's GSR pin thru an inverter.

You will be using the BORG clock which is already connected to pin 13. Remember to connect your clock (after the BUFGP) to the STARTUP's CLK pin. The 8MHz or 20MHz clock on the BORG is too fast for the LCD. You will need to make sure your state machine does not cycle through the instructions too quickly.

Since you are issuing 16 9-bit instuctions to the LCD, your design should have a combinational logic block which decodes the 16 instructions from 4 bits. Use a pla file to describe this logic and the SIS/eqn2xnf tools to translate the pla file into a macro that can be included in a schematic. To do this follow the directions in

  1. Create a pla file, say foo.pla.
  2. convert it to an XNF file (see Converting a PLA file to an XNF file),
  3. and then make a macro from it to use in your schematic (see Incorporate an XNF file as a MACRO in Foundation Schematic).

You must show me your working circuit by the due date.

You should submit:

  1. The schematics for your design.
  2. Printout of simulation.
  3. Printout of pla/xnf files.

The CMPE126 Web:
Copyright 2004; Department of Computer Engineering, University of California, Santa Cruz.
martine@cse.ucsc.edu