CMPE100 Slides -- Spring 07

Schematic for TAPS bike counter example(pdf)       (postscript)
Verilog for FSM control of bike counter example(pdf)       (postscript)

Delay Slides (pdf) (postscript)

Flip-Flop Slides (pdf) (postscript)

SROM interface example slides (pdf) (postscript)

Tri-State Buses (pdf) (postscript)


The CMPE100 Web:
Copyright 2007; Department of Computer Engineering, University of California, Santa Cruz.
Comments to: martine@cse.ucsc.edu